The introduction of additional mjData arrays for the implicit integrator caused in a shift in data alignment in memory. In certain combinations of machines and models, this change resulted in ~5% performance regression that appears to be attributable to L2 cache misses.
This change aligns all arrays in mjData to the boundary of a typical L2 cache line size. Benchmarking shows that this resolves the performance regression on a Broadwell machine.
PiperOrigin-RevId: 451652783
Change-Id: I4ed2c2d03453a83a0b4a9b8e224e2fd7c0dadea9
This allows us to detect reads and writes that are logically out of bounds.
PiperOrigin-RevId: 451520772
Change-Id: I614a8062c404d97148166bcd37db399420956d8b
Indiscriminate memset into d->buffer and m->buffer previously caused msan to not detect uninitialized reads.
Also fix tests with uninitialized read bugs that are detected by msan after this change.
PiperOrigin-RevId: 451508224
Change-Id: I1f4b080a8ef765c34ba7a0adc2c686419f6e5516
Saran Tunyasuvunakool